Cache-Major: A Hardware Architecture and Scheduling Policy for Improving DRAM Access Efficiency in GEMV

Jinhui Cheng, Xuanzhi Liu, Yue Cao, Wenjun Zhang, Zhongze Han, Bo Peng,

Yixuan Liu, Donglin Zhang, Yongkang Han, Xiaoxin Xu and Jianguo Yang

University of Science and Technology of China, China; Zhejiang Lab, China; Institute of Microelectronics of the Chinese Academy of Science, China

 

A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications

Xichen Duan, Yuzi Wang, Liuyang Zhang and Jie Liang

Shanghai University, China; Peng Cheng Laboratory, China

 

Silicon Nanowire Transistor Integrated with Phase Change Gate

Yan-Dong Ge, Wei-Hua Han, Chong Yang, Jun-Dong Chen and Xiao-Di Zhang

Institute of Semiconductors, Chinese Academy of Sciences, China; University of Chinese Academy of Sciences, China

 

A 300 kHz Bandwidth 1.66nV/Hz^1/2 Chopper Instrumentation Amplifier with Ripple Reduction Loop Using Multi-Rate Duty-Cycled Resistors

Mingshi Han, Lei Zhang and Yan Wang

Tsinghua University, China

 

Optimization of Specific ON-Resistance of Superjunction Device with Two-Zones Variation Vertical Doping Profile

Wenjun Li, Haimeng Huang, Zimin Zhang, Junji Cheng and Zhiming Wang

University of Electronic Science and Technology of China, China; Institute of Electronic and Information Engineering of UESTC in Guangdong, China; Priosemi Technology Limited Company, China

 

Comparative Study on Degradation of the TFET and MOSFET

Jiale Sun, Yuming Zhang, Hongliang Lu, Zhijun Lyu, Yi Zhu and Yuche Pan

Xidian University, China; Institute of Microelectronics Technology, Xi’an, China

 

Phenomenon and Mechanism Investigation of the Cryogenic Random Telegraph Noise for 18 nm FDSOI CMOS

Ying Sun, Xinze Li, Bing Chen and Ran Cheng

Zhejiang University, China

 

GNN-based TICER for RC Reduction on Large-scale Interconnect

Leyun Tian, Yuyang Ye and Hao Yan

Southeast University, China

 

A Novel Interface Trap 1T0C In-Ga-Zn Oxide DRAM Cell with Enhanced Data Retention

Haisu Zhang, Lin Bao, Zongwei Wang, Yimao Cai and Ru Huang

Peking University, China; Beijing Advanced Innovation Center for Integrated Circuits, China

 

A 12 Bit 250 MS/s Voltage-Time Domain Hybrid ADC

Yutong Zhao, Fan Ye and Junyan Ren 

Fudan University, China

 

 

All the winners of paper awards will be informed and received the electronic honorary certificates soon.