IEEE International Conference on Solid-State
Integrated Circuit Technology

Oct. 25- Oct.28, 2016

White Horse Lake Jianguo Hotel, Hangzhou, China

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Conference News


Call For Papers

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The ICSICT-2016 conference is the 13th in the series aiming to provide an international forum for the presentation and discussion of recent advances in solid-state and integrated circuit technology. The conference will be held on Oct.25-28, 2016 in Hangzhou, China. All aspects of solid-state devices, circuits, processing technologies, materials and other related research are within the scope of the conference. The three days of contributed and invited presentations on the latest developments in diverse fields given in oral and poster sessions, panel discussions on leading edge technology issues, and other activities will provide extensive opportunities for technical information exchange as well as a stimulating environment for mutual communication among participants. An exhibition of equipment and materials for solid state and integrated circuit technologies will be held concurrently with the conference. In addition, there will be discussions devoted to opportunities for cooperation and joint ventures in the microelectronics business in China. Excellent Student Paper Award will be presented at the closing of the conference.


(Papers are solicited in, but not limited to the following areas)

VLSI Technologies
1. Channel Engineering
2. High-k/Metal gate Technology
3. Advanced Source/Drain Technology
4. Interconnect Technology
5. Advanced 3D Integration
6. Novel Process Technologies
7. Ultra-Thin Body Transistors and Device Variability
8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms
9. CMOS Performance Enhancing and Novel Devices
10. Advanced FinFETs and Nanowire FETs
11. CNT, MTJ Devices and Nanowire Photodiodes
12. Low- Power and Steep Slope Switching Devices
13. Graphene Devices
14. Advanced Technologies for Ge MOSFETs
15. Organic semiconductor devices and technologies
16. Compound semiconductor devices and Technology
17. Ultra High Speed Transistors, HEMT/HBT etc.
18. Photoelectron Devices
19. Advanced Power Devices and Reliability
20. Flash Memory
21. IT Magnetic RAM
22. Resistive RAMs
23. Phase Change Memory
24. 3-Dimensional Memory
25. MEMS Technology
26. Thin Film Transistors
27. Biosensors
28. PV and Energy Harvesting
29. Front End of Line (FEOL) Reliability
30. Memory Reliability
31. Back-End of Line and ESD Reliability
32. High-Frequency and Multi-Gate Device & Modeling
33. Advanced Device Performance and Variation Modeling
34. Simulation of Memory Devices
35. Simulation of Non-Silicon Materials and Devices

VLSI Circuits & ICCAD
36. Processors
37. Analog Circuits
38. SOC
39. PLL and CDR
40. Low-Power Nyquist ADCs
41. Digital Circuits Resilient
42. High-Resolution and High Speed Data Converters
43. Digital Chip-to-Chip and On-Die Interfaces
44. Advanced Clock Generation
45. Clocking Building Blocks
46. High Speed On-Die Network Processor Clocking
47. FPGA
48. Embedded Memory Circuits
49. Advanced Transceivers Techniques
50. RF and New Wireless Transceivers
51. RF Circuits and Systems
52. Interference Robust RF Receivers
53. Signal Processing for Wireless
54. System-Level Modeling & Simulation/Verification
55. System-Level Synthesis & Optimization
56. High-Level/Behavioral/Logic Synthesis & Optimization
57. Physical Design
58. DFM

Prospective authors are requested to submit
3 pages camera-ready full length paper in English for proceedings publication. The proceedings will have an IEEE catalogue number and will be collected in IEEE publication database ---- IEEE X’plore.
Deadline for Camera-Ready Full-Length Paper Submission: June 30, 2016
Notification of Acceptance: Aug. 15, 2016

On-line submission at web-site is required.


About paper submission, please contact:

Prof. Yu-Long Jiang
School of Microelectronics
Fudan University
Shanghai 200433, China

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