No.

First
Name

Last
Name

Affiliation

Country /
Region

Topic

Progress in silicon photonics integrating quantum dot lasers

Grenoble INP-Minatec / Sinano Institute

Challenges and possible solutions for high performance sustainable Nanoelectronics

Arizona State University

Robust In-Memory Computing for Deep Learning Algorithms

Hong Kong University of Science & Technology

3D Airgap Technology for CMOS Interconnect Capacitance Reduction

7

National Tsing Hua University

Modeling and Design Methods of SRAM-based Computation-in-Memory Circuits

National University of Singapore

Low Temperature Bonding Technology Development for 3D and Heterogeneous Integration

Extending Flash from Memory to Storage and the Applications for In-memory Computing (IMC)

National Chiao Tung University

National Chiao Tung University

One-Time-Programming Memory in the Era of High-k Metal-gate CMOS Generations

Toward fault-tolerant superconducting quantum computing systems

Ding

Gong

Cogenda Inc.

China

Nanjing University of Posts and Telecommunications

AI-based Design Technology of Semiconductor Power Devices

Multifunctional Sensors Capable of In-Sensor Data Processing

Huazhong University of Science and Technology

Memristive Neural Network for Reinforcement Learning

National University of Singapore

22

Hong

National Taiwan University

Perfecting high-k/III-V and /Ge interfaces in realizing high-performance MOSFETs for ultimate CMOS and emerging cryogenic electronic devices

Shanghai Institute of Science and Technology

Recent Progress in GaON for Performance Enhancement of GaN-based Devices

Hafnia-based ferroelectric devices and applications

26

Parity-Time Symmetric MEMS

Tokyo Institute of Technology

Subramanian S.

Heterogeneous integration for Flexible Hybrid Electronics

Multi-level storage of ferroelectric domain wall memory

Challenge and Issue of Waveform Sampling Method

Saudi Arabia

ESD Robustness of Silicon Nanowire Transistor Combined with Thermal Analysis and Optimization

37

Li

China

A MEOL and BEOL logic layout optimization recommendation under 3 nm CFET architecture and beyond

Intelligent and Interactive Analog Layout Design Automation 

40

Hongxia

Liu

China

Nanjing University of Aeronautics and Astronautics

Energy Efficient Approximate Computing Circuits and Systems

Liu

A BEOL layout optimization method for advanced logic standard library cells

43

45

Design automation for superconducting circuits

New Mexico State University

Low contact resistances and Reduced Fermi level pinning to 2D semiconductors using physisorptive Moire Interfaces 

51

Histogram-based Defogging Techniques for LiDARs

Technische Universitaet Ilmenau

Microwave Transistors – The backbone of 5G and Beyond Communication Systems

 Technical University Vienna

Design Analysis of Ultra-Scaled MRAM Cells

Tokyo Institute of Technology

Ka-band Phased-Array Transceiver for Satellite Communication (tentative) 

FinFETs: Is there an impact on the LF nosie?

Quantum Computing for Devices Electro-Thermal Modeling and Simulations

58

Warsaw University​ of Technology​

Wide bandgap semiconductor ultraviolet light emitting devices and detectors 

University of California, Riverside

Artificial Intelligence (Process & Device)/ Process Simulation & Modeling        

A review on direct digital conversion for biomedical signal acquisition Ics

High-Speed High Resolution Pipelined ADC Design

Metal-oxide based Device for Neuromorphic Perception Applications

66

Institute of Semiconductors, CAS

67

Wang

Peking University

Graphene based nanofluidics for molecular transportation

68

Design-for-Reliability (DFR) Challenges for Advanced CMOS Technology: Transistor Degradation, Circuit Aging and EDA Tools

A signal processor and circuits for hearing aiding

70

Kyushu Institute of Technology

Hong Kong University of Science and Technology

Parallel Dual-Gate Thin-Film Transistor Technology for the Implementation of Neuromorphic Circuits

A Multi-Objective Loss Function Design for RRAM-based Neural Architecture Search

Institute of Semiconductors, Chinese Academy of Sciences

Edge Computing CMOS Vision Chip with Sensing, Memory and Processing Capabilit

A CDU budget and process window study with EUV lithography for 3 nm CFET logic processes and an outlook for future generations

East China Normal University

In Situ Reliability Study for the sub-5nm Devices

University of Massachusetts, Amherst

Memristor Chips and Systems for Energy-Efficient Learning

Ga2O3 based bipolar power devices through p-n heterojunction implementation

Singapore University of Technology And Design

An ultra-low power 2.4 GHz receiver design techniques for IoT applications

Ultra-flexible organic photonic system for detecting the bio signals.

Nanyang Technological University

85

Chiplet Design Tool Development for Wafer-Scale Integration Aimed at Brain-Inspired System

Univ. of Electronic Science and Technology of China

Liverpool John Moores University

Criteria for selecting statistical distribution of Random Telegraph Noise 

Liverpool John Moores University 

Relaxation in GeSe Ovonic Threshold Switching Device

Nanjing University of Posts and Telecommunications

Organic and Flexible Devices based on Metal-Containing Organic Semiconductors　

SPICE Latch-up model valid for both transient and static latch-up testing

The Road of 2D Semiconductors in Silicon Age

Nanyang Technological University

Future III-V/CMOS Co-Integrated Technology and Hybrid Circuit Design